Better Late Than Never

Better late than never, although in this instance, it’s really really late—about thirty years late. In the world of computing, that is eternity.

The talk is about the new CR4.UMIP control bit documented in the latest (revision 58) Intel SDM, and the corresponding CPUID feature bit. When set, the CR4.UMIP (User Mode Instruction Prevention) bit prevents the SGDT, SIDT, SLDT, SMSW, and STR instructions from being executed outside of the highest-privileged code (ring 0).

The question is of course why it was ever possible to execute these instructions from unprivileged code. Setting the critical registers (GDTR, IDTR, LDTR, MSW, TR) was never possible from user code, but they could be freely read. The excuse Intel had back in 1982 (when these instructions became part of the 80286) was that they didn’t know what they were doing. That was much less of an excuse with the 386 and by the early 1990, it was well known to be a problem. Continue reading

Posted in 286, Intel, x86 | 8 Comments

Updating Windows

Updating older (but still supported) Windows versions can be a tedious tasks. Not only for humans but also for computers. Searching for updates for half an hour every time with the CPU going at full tilt must be a not insignificant contribution to global warming.

As everyone knows by know, Microsoft recently released what amounts to Service Pack 2 for Windows 7. From personal experience I can say that it works very well, whatever it is called. The point of the patch is that it resets the baseline for Windows Update. Instead of searching for 5 years’ worth of updates since Windows 7 SP1, there are just a few. Microsoft also changed the release cycle to monthly updates, which further reduces the number of variables.

Of course the patch isn’t automatically delivered through Windows Update and the download process is designed to remind everyone why ActiveX was such a dumb idea. But it does do its job once applied and brings down the time to check for updates to something quite reasonable. Continue reading

Posted in Microsoft, Windows | 14 Comments

What’s the Point…

Somethings things just don’t make much sense. Like this, for example:

Double Dream

Double Dream?

What’s unusual about an ISA sound card with a wavetable daughterboard? Nothing. But experts will recognize that the host card is a Terratec Maestro 32/96, which already has a built in-synth.

There oddest things about this setup is that the host card’s synth is essentially a superset of the one on the daughterboard. For that reason, the daughterboard’s presence has very questionable utility. Continue reading

Posted in Sound | Leave a comment

Any Soundscape VIVO fans here?

While digging into the implementation of Sound Blaster compatibility on PCI cards, I found an unexpected gem. Ensoniq’s U.S. Patent 5,790,837 includes partial source code for the Sound Blaster emulation driver used with the Ensoniq Soundscape VIVO boards, SSINIT.COM.

Ensoniq SoundScape VIVO

Ensoniq Soundscape VIVO

The VIVO boards were Ensoniq’s last ISA-based product (introduced in 1995) and shared a common trait with the PCI-based ES1370 and later devices: There was no hardware Sound Blaster compatibility. Instead, Sound Blaster digital audio as well as AdLib FM synthesis were emulated.

Now the VIVO was a bit of a mixed bag. While the Sound Blaster compatibility wasn’t bad, it required EMM386 and a TSR and was therefore fundamentally incompatible with certain games. The AdLib emulation was not so much emulation as approximation, as it tried to replace a FM synth with wavetable synthesis, with mixed results. On the upside, the wavetable synth (1MB ROM) was not at all bad, and the cards were cheap (and therefore used in many OEM systems). Continue reading

Posted in Ensoniq, Sound, Sound Blaster, Source code | 3 Comments

The Wave Blaster II Does Talk!

As previously mentioned, the Wave Blaster II (aka WB2) documentation makes no mention of possible bidirectional MIDI communication. But while trying the Wave Blaster II control panel with various host cards out of desperation, an interesting thing happened: When attempting to go to the preset screen, I was informed that I couldn’t because “MIDI In is currently busy”.

Now that’s interesting because the MIDI implementation chart for WB2 makes absolutely no mention that the device might send anything. Then again the chart does not list system exclusive messages (SysEx) at all.

A quick look at WP2CPL.EXE with a disassembler confirmed that the control panel preset dialog only opens if the device responds to a SysEx. What does the SysEx do? Continue reading

Posted in Creative Labs, Wave Blaster | 15 Comments

Deeper Into Wave Blaster

I have continued to dig into the mysteries of Wave Blaster (WB) connectors, daughterboards, and DB-50XG MIDI. To recap, the objective is to find how to convince a Yamaha DB-50XG to send MIDI data, if at all possible.

A closer look at a DB-50XG confirmed that both MIDI IN and OUT are definitely connected. Pins 4 and 8 of the WB connector are connected to pins 15 and 16 (I think!) of the Hitachi H8/3002 MPU. Those are the Rx and Tx pins, so that makes good sense. The signals are routed all around the daughterboard.

So technically a DB-50XG is definitely capable of outputting MIDI data. Whether it can actually do it is a different question. Without detailed documentation or a firmware dump I’m just guessing.

Even if it does work, the next question is whether bi-directional MIDI communication is possible on a typical PC sound card with a WB connector. But there’s more about that too. Continue reading

Posted in MIDI, Wave Blaster, Yamaha | 6 Comments

Zapping the SVP on a T42p

A T4x ThinkPad with a supervisor password is a ticking time bomb. The password is not needed during boot and is only required to change certain BIOS settings, something which isn’t typically needed. But if CMOS settings are lost, the BIOS setup must be entered and the SVP will be required.

That’s exactly what happened to me. I had an old T42p (2.0 GHz Pentium M) with unknown SVP, happily working. Then somehow the CMOS got scrambled. I have no idea why, because the backup battery still seems fine. At any rate, the SVP was required and I didn’t know it. Bricked.

To recover the password, it can be read from an EEPROM but then has to be decoded. That may or may not work. Or a $100+ USB gadget can be procured—worthless for a single use because a replacement T42p system board would cost less. Or the EEPROM could be desoldered and replaced with a “good” password-less one (which I don’t have). Neither option seemed appealing so the T42p was sitting around gathering dust for a while.

Then a kind reader posted this link. Clearing the password with no special tools and no soldering? What could possibly go wrong… Continue reading

Posted in Hardware Hacks, ThinkPad | 3 Comments

Can a DB-50XG Talk?

I seem to have embarked on another crazy research project. It was spurred by a broken Yamaha DB-50XG wavetable daughterboard. The DB-50XG was a bit dirty but not obviously damaged. It produces no output but gets warm exactly like a functioning specimen, so it shouldn’t be completely blown.

DB-50XG (not broken)

DB-50XG (not broken)

But because there’s no obvious damage, I don’t know where to start looking for defects. It could be that the MIDI IN signal doesn’t even arrive, or the digital part is damaged, or the analog part isn’t working… lots of possibilities. So I thought, if I could get the daughterboard to send some MIDI data back, I’d at least know that the MIDI processing stages work, right?

Well… after a few days of poking around, I still don’t know if it’s even theoretically possible, let alone how to do it. Let’s list the various obstacles… Continue reading

Posted in Sound, Wave Blaster, Yamaha | 1 Comment

Solaris 7 Boot Panic

On some systems, it has been observed that Solaris 7 panics during boot from installation media and reboots the system. At least Solaris 7 U1 (3/99) and U4 (11/99) are affected. Only “fast” systems (definitely including Sandy Bridge 3+ GHz processors) exhibit this problem, and the exact behavior depends on hardware configuration.

When booting with kadb, the system doesn’t reboot itself and the panic information can be easily read:

Solaris 7 Panic

Solaris 7 Panic

Clearly a page fault caused a null pointer dereference… but why? Continue reading

Posted in Bugs, Debugging, Solaris | 5 Comments

IBM OS/2 1.x Programming Documentation Added

IBM’s programming documentation (Programming Tools and Information, aka PTI) for OS/2 versions 1.2 and 1.3 has been added. Big thanks to Bob Eager who scanned the originals and converted them to PDF.

The documents have been added to the OS/2 1.x programming library. The newer REXX documentation is technically part of the OS documentation set, but thematically belongs with programming information.

Posted in Development, Documentation, IBM, OS/2 | 2 Comments