S3 Graphics Accelerators and the 8514/A

The previous article about the IBM 8514/A graphics accelerator and clones did not mention S3’s chips because S3-based graphics cards were never 8514/A compatible, unlike the ATI Mach 8 and Mach 32 chips and others. However, the relationship between S3 chips and 8514/A is a bit more complex.

S3 Inc. (later known as S3 Graphics) was founded in 1989 and in mid-1991 it released the S3 911, the first single-chip SuperVGA GUI accelerator (the 911 designation was a reference to the Porsche 911). This was soon followed by S3 924, 928, the S3 Vision family (864/964/868/968), and finally by the extremely successful S3 Trio integrated GUI accelerators (Trio32, Trio64, Trio64V+). The 3D-capable S3 ViRGE and Savage chips never reached the popularity of their 2D-only predecessors.

SPEA Mercury V7

Reviewing a data sheet for the “S3 Trio64V+ Integrated Graphics/Video Accelerator”, it is obvious that there was a very close relationship between S3 accelerators and the 8514/A. The same relationship is also apparent in the OS/2 DDK for example, where the sample Presentation Manager accelerated driver shares a significant portion of code between 8514/A and S3 drivers.

The S3 draw engine was obviously designed to be compatible with the 8514/A. This includes register naming (VESA-approved 8514/A register names), I/O addresses used for the registers (at least in later chips only optionally), and register layout. This similarity made it easy to port existing 8514/A drivers to support S3 hardware. At the same time, the S3 chips were never 100% 8514/A compatible and running unmodified 8514/A code on S3-based cards was out of the question.

The S3 graphics chips combined a VGA core with SuperVGA capabilities with an accelerated draw engine. The Trio series also added a DAC and a PLL synthesizer on the same chip (hence a “trio” of integrated chips). The display engine (often called CRTC, or CRT Controller) was a VGA/SuperVGA design and didn’t resemble the 8514/A at all. No less important was the fact that as integrated VGA/GUI accelerator designs, the S3 chips never had separate VGA and accelerator framebuffers, and the framebuffer was directly accessible from the host (whether in a banked fashion or mapped linearly).

The draw engine itself was also not identical to the 8514/A, despite the very high degree of similarity. S3 extended it to support higher color depths (16, 24, and 32 bits per pixel) and larger memory sizes, but even the in 8-bpp modes there were differences.

Where the 8514/A supported 32 mixes, S3 only supported 16 (the basic logical operations were retained while the additions/subtractions were dropped). There was no provision for the host to read the data which the draw engine would write—since the host could access the framebuffer directly, this functionality was unnecessary. Color comparisons were simplified to only support equality or inequality, no ranges.

The draw engine commands were also slightly different. S3 dropped the vertical rectangle fills (which achieved the same effect as the standard horizontal fill) as well as area fills, but added pattern blits (PatBLTs) which replicated an 8×8 pattern to a destination rectangle, a common GUI operation.

It is apparent that if an existing 8514/A driver were used as a starting point, the mode setting code would have to be very significantly modified if not entirely replaced to support S3 chips. On the other hand, the drawing code could most likely be kept with minor modifications (perhaps changing the register access mode from I/O to MMIO and slightly changing certain operations) and certainly retaining the overall structure.

Overall, S3 was clearly very much inspired by the 8514/A draw engine and its register interface, but felt free to both extend the functionality and drop existing 8514/A features that were not considered important, presumably to simplify the design and reduce cost. Being compatible with existing 8514/A software was not S3’s objective, and not a requirement in the age of Windows.

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