While researching the history of 486s for a previous article, I came across a fascinating Wikipedia entry and its associated talk page. It’s a nice showcase of inmates running the asylum, and a reminder that Wikipedia can’t be considered an authoritative source of information because the quality of encyclopedia entries is wildly uneven. It’s not all bad, and it could be argued that the average is quite good, but there’s no minimum quality guarantee.
Even now the 486SX article contains demonstrably incorrect claims such as this: The FPU upgrade device was shipped as the i487, which was a full blown i486DX chip with an extra pin. The i487 was installed in an upgrade socket and the extra pin was either a power or ground pin that indicated that the i487 was installed. That signal was used to disable the i486SX when the i487 was installed.
Well, no—there is an extra pin, but it has no electrical function whatsoever. It merely prevents the chip from being installed incorrectly. And there is a pin (NC#) indicating that an upgrade processor is present designed to “shut off” the original CPU, but it is one of the standard 168 pins. The text conflates facts and turns them into a falsehood. The pins are publicly documented in Intel datasheets and it’s not so hard to find the actual information.
Then there is just plain BS like this: Back in the early 1990s, common wisdom held that it wasn’t advantageous for most users to have an FPU. Thus, many typical household applications already in existence like word processing and email were designed specifically to avoid using floating point operations.
Let’s not even discuss wether email was a”typical household application” in the early 1990s. Buy no, it was not “common wisdom” that most applications shouldn’t require an FPU, it was a reality of the market. FPUs were a separate item costing several hundred dollars and most PCs didn’t have any. Only a complete moron would write a word processor requiring an FPU under those conditions. That naturally led to a feedback loop and most users had little incentive to buy an expensive FPU that wasn’t going to bring any benefit.
In fact Intel was apparently making such a killing selling FPU upgrades (to the spreadsheet and CAD users who did benefit) that at least four companies designed and marketed compatible 287 and 387 replacements (IIT, ULSI, Cyrix, C&T). A clear indication that FPUs were rather overpriced.
But let’s get back to the claim that most of the talk page is about: All early 486SX chips were actually i486DX chips with a defective FPU. If testing showed that the central processing unit was working but the FPU was defective, the FPU’s power and bus connections were destroyed with a laser and the chip was sold as an SX; if the FPU worked it was sold as a DX.
There was always a rumor that 486SX processors were DXs with faulty and disabled FPU. But it was just that, a rumor, because Intel of course never stated what the real story was.
There was at least one compelling reason for the rumor: The early (1991-1992) 486SX processors had the same die size as their 486DX brethren. That was not the case for newer (since approx. late 1992) 486SX processors which had visibly smaller die compared to their DX counterparts.
There was however at least one good reason to doubt the rumor—the timeline never made any sense. The 486DX started shipping in volume in late 1989. The 486SX was only introduced in mid-1991. In the first 18 months or so when yield problems would have been the worst, there was no SX.
The Wikipedia talk page gives a very plausible, if impossible to officially confirm, alternative explanation, from someone claiming to have worked on 486 development at Intel at the time: The SX and DX chips were initially indeed the same (almost), but there was never any rebranding of chips with broken FPU. All along the i486 DX had a mechanism which allowed the FPU to be permanently disabled after production. The SX chips had the FPU disabled that way and the coprocessor part was never tested at all (so it might or might not function correctly).
There is another supporting argument for the alternative story: The CPU identification. Amusingly, the Wikipedia editor was utterly unaware and outright refusing to believe that all 386 and 486 processors have a way to return their “CPU ID”, but only immediately after reset. Newer chips return the same information as part of the family/model/stepping data through the CPUID instruction.
The point is that apart from the FPU, there is one difference between SX and DX chips: The model designation. All 486s are members of family 4, but old DX chips return model 0 while SX chips indicate model 2. The stepping information is not directly comparable either. There is no evidence that the CPUID information is adjustable after production which means the chips were manufactured as either SX or DX.
There is a related story. A naive programmer might think that the FPU-related bits in CR0 could distinguish between 486 SX and DX processors. Robert Collins wrote about this and mentioned that although Intel datasheets indicate different behavior of the CR0.ET bit on SX and DX parts, in reality the chips all behave the same. OS/2 Museum’s internal testing confirms that—CR0.ET and CR0. NE bits behave identically on 486 SX and DX processors.
The ET bit is hardwired to 1 (indicating a 387-style FPU), and the NE bit can be freely toggled, enabling internal FPU exception delivery even on SX chips with no FPU. It would be logical for SX parts to prevent the CR0.NE bit to be set… but that simply isn’t the case. Obviously the Internet can’t be trusted (with the sole exception of this blog).