The CPUs that fit into a 386 socket are well known: Intel’s original, AMD’s exact copy, and Cyrix/TI upgrades. There is also IBM’s 386SLC which is close to a 386 but can’t be plugged into a standard 386 socket. The photo below shows a selection of eight more or less common PGA-132 processors with Intel/AMD and Cyrix/TI cores:
The ninth is not like the others—a C&T Super386.
The Chips & Technologies Super386 or J38600DX is so obscure that it’s not mentioned in most lists of x86 processors and not detected by most software. Yet the C&T 386 was the first commercially available clean-room clone of the 386, beating Cyrix to market by several months (AMD’s Am386 chips were exact copies and not clones). So what went wrong?
Intel Strikes Back
In the 1980s and 1990s, Intel fought x86 clones as hard as it could. NEC, AMD, Cyrix, UMC had been sued by Intel. AMD and Cyrix withstood Intel’s wrath, but others didn’t.
Intel went after C&T as well. Chips and Technologies used clean-room implementation techniques to avoid any kind of copyright infringement, but as is well known, that’s not a defense against patents.
In March 1992, Intel sued C&T for infringing five patents (InfoWorld, March 6, 1992, page 29). Texas Instruments became a party to the lawsuit in an effort to protect C&T; Texas Instruments had a broad patent cross-licensing agreement with Intel and manufactured the C&T Super386 chips.
At the same time C&T was going through a downturn, cutting costs and workforce. It was not in a position to fight Intel at the time.
The case was reportedly settled in 1993. At that point, the Super386 was most likely long out of production. Interestingly, C&T refocused its business on graphics chips and made a name for itself in the laptop video chip business. In 1997, Intel acquired C&T in order to get the portable graphics expertise.
More can be found for example here in the LA Times archive.
Too Little, Too Late
To put things in perspective, the C&T Super386 started volume shipments in early 1992, having been announced in September 1991. At that time, the 33 MHz 486 was readily available and the 66 MHz DX2 was right around the corner, with the Pentium on the horizon.
C&Ts standard 386s offered about 10% better performance at the same clock speed compared to Intel/AMD 386s, but that’s a very weak upgrade argument and unlikely to convince system designers to choose C&T.
While C&T also designed 386s with L1 cache, those weren’t pin-compatible. Those would have offered more substantial performance benefit, but couldn’t be plugged into any existing 386 system.
In contrast, Cyrix was much smarter in designing the 486DLC family to use the standard 386 socket and employing an array of clever hacks in order to enable L1 cache even on old 386 boards with no hardware or firmware support.
It’s not surprising that the C&T Super386 was only on the market for a few months. The announced SX variants never materialized and it’s unclear if the J38605DX processors with L1 cache were ever produced in any kind of volume or at all. It does not appear that any chips other than J38600DX survived into the third millennium.
Unfortunately the Super386 went out without a bang or a whimper, so it is difficult to tell quite how long it was on the market, what variants and clock speeds were produced, or how many units were sold.
What Is It?
Lest the reader think that the C&T Super386 is some kind of hoax—it was mentioned in the press in the early 1990s several times. The September 16, 1991 issue of InfoWorld (page 1) is one example, the paper of record is another.
The J38600DX looks to most software like a standard Intel/AMD 386. It should be possible to distinguish the Super386 by lack of certain errata common to all Intel/AMD CPUs. Some suggested using the lack of POPAD bug.
The Undocumented PC tool CPUTYPE incorrectly identifies the Super386 as a Cyrix part (there is no mention of the C&T 386 in Undocumented PC, even though every other 386 variant is covered). This suggests that the behavior with respect to undefined flags is different between C&T and Intel/AMD 386 cores.
Running CPUTEST, another Undocumented PC tool, revealed that the C&T Super386 implements at least one instruction not found in any other 386-class CPU. The first two bytes of the instruction are 0Fh, 18h. The C&T is almost certainly the only processor with no CPUID capability which supports that instruction, as the encoding was only used many years later.
How Does It Work?
After a brief test drive, it’s clear that the Super386 works well with typical DOS software, including EMM386, 32-bit protected-mode titles, and Windows 3.11. It performs slightly better than an equivalent Intel/AMD part, but the difference is not noticeable by the naked eye.
C&T no doubt benefited from its expertise with 386 chipset design and reverse engineering standard hardware (such as the VGA). C&T also produced an integrated 8086 clone, but a 386 is orders of magnitude more complex. Producing a working 386 clone was certainly not an easy task.
The Chips and Technologies Super386 was a valiant but short-lived effort to compete with Intel’s 32-bit CPUs. It was the first clean-room 386 clone on the market and also the first one to disappear. Were it not for the few mentions in the press and some surviving chips, it would be hard to believe that the C&T Super386 ever existed.
Wanted: Any kind of official C&T 386 documentation.
Since it is so rare and hard to find CPU I wonder how the authors of the Opcode List knew about lack of POPAD bug. I highly doubt they were able to test on real CPU. Would be interesting to learn one day if this is really the case.
Some people clearly had a C&T 386 back in the day. The Internet existed too, so it was possible to let other people test code. I think the lack of the POPAD bug was a reasonable assumption because a clean-room implementation was unlikely to have the same bugs.
Maybe you could contact the author of the C&T documentation; possible might have an extra copy kicking around in a back room
Also, look for US Patent 5,455,909 which explains the “Super State” mode as would have been used in the processors ending in 5 (that is the ones that would also have had extra cache). John Dvorak’s column in PC Mag where he misinterprets this into the creation of the ultimate virtualization chip is an interesting aside. I haven’t looked at all the C&T patents to see if any other ones provided information about this chip design.
Fired off an e-mail, thanks for the hint.
I’ll take a look at the patent but I fear the SuperState is effectively a fairy tale just like the 38605DX itself. The SuperState should have been something like SMM. The problem is that as far as I can tell, no one has a C&T 38605. My current best guess is that the 38605DX was never produced in any kind of volume, just like the SX variants. Only the 38600DX was provably available back in the day (benchmark reports exist) and some number survived to this day.
Later: The patent does give hints of virtualization/debugging features that go significantly beyond SMM. With memory and interrupt trapping, it would have been possible to do rather interesting things.
Something called the SuperState R is also described in the F8680 PC/Chip documentation. Obviously that wasn’t a 386, but there are hints of e.g. emulating an AT-style keyboard controller using SuperState. Hard to say how the SuperState differed between the 8086 and 386 parts.
J38605DX is exists, but very rare.
At lest one well known cpu collector has it.
Not sure if photos are visible without registration, here is the direct link:
J38600DXs are not so rare, many have them.
Another interesting thing from C&T – 387 coprocessors.
PS Thank you for the great blog!
Very interesting. That’s one 38605DX CPU so far 🙂 I hope the corresponding board exists too, otherwise the CPU is no good.
If you mean “many collectors have them” then that’s true I’m sure. But the C&T 38600DX was never a common CPU (as evidenced by the lack of support in utilities and hardly any mention in literature) and it’s several orders of magnitude harder to find than typical Intel/AMD/Cyrix 386 processors nowadays. But if you’re comparing them to something like NexGen 6×86 then yes the C&T Super386s are very common. It’s all relative.
Yes, the C&T 387 was probably the coolest looking FPU!
So that Super386 manual lives! And already has me confused. Some sections say that “SuperState V” only applies to the 38605DX, yet the SuperState chapter clearly implies that all Super386s have it. On the 38605, there are additional pins for SuperState support, so on the plain 38600 it wouldn’t be usable for power management and such. It would still be usable for debuggers etc. though. Have to run some experiments.
Oh, did you obtain this rare manual?
Is it possible to get a copy from warthman.com?
I am very interested!
Not exactly. What I have is a very incomplete draft which is missing almost all the Super386-specific information (it’s more or less a standard 386 programming manual). Please wait a few days for the next post.
Pingback: More on the C&T Super386 | OS/2 Museum
Pingback: Calling C&T SCALL safely | corexor
Pingback: Shiniest x86 Chip | OS/2 Museum
I found a video online where someone goes through the combinations of C&T CPU/FPU and Intel CPU/FPU. Results from certain combinations were surprising, but to answer my question, it does look like the C&T FPU will work without a C&T-specific CPU. Here is the video, if interested.
As far as I know the C&T FPU is 387 compatible and was never meant to work only with C&T’s own CPUs. The SuperMathDX manual explicitly states that the FPU is “designed for use in computers that have an Intel 80386 or compatible microprocessor”. That should be a sufficiently authoritative answer.
I am not sure why I was thinking the C&T Super Math FPU had to be run with the C&T CPU, but perhaps I was confusing it with the Intel RapidCAD. I assume the RapidCAD PGA68 FPU must be run with the RapidCAD PGA132 CPU? I just bought the C&T Super Math FPU and am looking forward to testing it.
RapidCAD is a completely different case. The “FPU” isn’t really a FPU (the whole point is that it’s a 486 with a built-in FPU), but the second chip is still needed to interface with the 387 signals.
I have a RapidCAD pair but have never been able to get it going. I was also not able to find any documentation whatsoever about it, only that is’a 486 with no L1 cache.
The C&T FPU is really just another 387 clone, like the ones from Cyrix/IIT/ULSI.
So I just found something interesting, while looking up something completely unrelated to this CPU, or so I thought:
-NexGen to Unveil F86-Based Workstations, Tom Moran, InfoWorld, July 18, 1988
And that didn’t put a clickable link in (I tried to get fancy with blockquote cite), so here’s the source URL… https://books.google.com/books?id=5D4EAAAAMBAJ&pg=PA3&lpg=PA3&dq=nexgen+#v=onepage&q=nexgen&f=false
That’s pretty fascinating. F86 was indeed the codename of NexGen Nx586, and this was definitely the same NexGen (Thampy Thomas is anything but a common name). It’s not surprising that the Nx586 was in development for so long, but I’m a little surprised that they talked about it so early.
Also interesting that C&T’s 386 clone had come and gone by the time Nx586 actually showed up. I wonder how much C&T really did for NexGen, it makes sense they’d design a chipset but that sounds like they worked together on the CPU. Then again we do know the C&T Super386 existed, so CPU design cooperation between the two companies is quite plausible.
Still have to wonder what NexGen thought they were going to show in the first half of 1989.
Here’s another mention of NexGen F86 from 1990: https://books.google.de/books?id=tqJbouvq9SkC&lpg=PT89&ots=oiP8RApmfz&dq=nexgen%20f86%20dvorak&pg=PT89#v=onepage&q=nexgen%20f86%20dvorak&f=false
May be worth looking at these papers, that were presented in 1989 (they’re paywalled, so I haven’t seen them):
That said, it looks like they were targeting the extreme high-end at first, and then moved downmarket when they shrunk the design to three chips (Nx586, Nx587 (which never shipped), NxVL).
I’ll go over the papers, thanks for the pointer!
I read through the papers. Only one of them is really interesting (the longest one, “Pipeline control for a single cycle VLSI implementation of a complex instruction set computer”). It describes (in 1989) a multi-chip CPU with very modern characteristics: Out of order execution, branch prediction, multiple CPU support, cache coherency. The described design does not provide superscalar execution (i.e. multiple execution units) but it has enough internal parallelism and pipelining that it’s able to execute close to one instruction per cycle.
Seems like another wild J38605DX appeared a month ago:
Still missing compatible Motherboards?
I don’t know of any boards that could use the cache on the J38605DX. No idea if there were any. I’m not sure the J38605DX was ever a “production” CPU, either. Not many of those CPUs could have been made.